Glossary / Semiconductors
Dennard scaling
The design rule that shrinking a transistor's dimensions and voltage by the same factor makes it faster and more efficient while keeping heat per unit area constant.
In 1974 Robert Dennard and colleagues at IBM showed that scaling a MOS transistor's length, width, oxide thickness and voltage down by the same factor raises speed, lowers power per transistor, and keeps the chip's power density constant[1]. It was the theoretical basis for "smaller makes everything better".
It broke down in the mid-2000s: below a certain voltage, current leaking through transistors that are supposed to be off rises sharply. Since then, performance gains have needed other tricks, such as three-dimensional transistors and multiple cores.
Related terms
- MOS transistorA transistor built from a metal electrode, an oxide layer and a semiconductor, in which a voltage on the electrode alone opens and closes the channel. Most of today's chips are made of these.
- CMOSA circuit style that pairs the two opposite types of MOS transistor. Current flows only at the moment of switching, so power consumption is tiny.
- FinFETA three-dimensional transistor in which the channel stands up like a fish's fin and the gate wraps around it on three sides.